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Category: Clock buffer, driver, phase-locked loopDescription: Si53119、19 Output PCIe clock buffer, Silicon Laboratories' Si53119 EK is a PCIe clock and development kit that provides high performance per watt for compliance with PCI Express ® Clock applications required for the Gen1/2/3 standard. These clock generators and buffers have twice the power and can provide up to 50% margin, complying with PCI Express jitter specifications. The Silicon Labs Si53119 EK PCIe clock generator and buffer fully integrate termination resistors, reducing BOM costs, board space requirements, and design complexity. Si53119 is a 19 output, low-power HCSL differential clock buffer that meets all performance requirements of the Intel DB1200ZL specification. Nineten 0.7 V low-power, push-pull HCSL PCIe Gen 3 output 100 MHz/133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming, covers HW pin lockout value with 9 SMBUS address configurations to allow multiple buffers to independently VDDIO in single control network 3.3 V power supply voltage operation, for output PLL or bypass mode, allows spread frequency of 1.05 to 3.3 V input/output power supply voltage of 50 ps output to output skew of 50 ps cyc cyc jitter (PLL mode), low phase jitter (compliant with Intel) ® QPI, PCIe Gen 1/Gen 2/Gen 3) 100 ps Input to Output Delay Wide Temperature Range: -40 to 85 ° C 72 Pin QFN Clock Generator/Buffer72241+$1035.562310+$999.226850+$994.6849100+$990.1429150+$982.8758250+$976.5171500+$970.15841000+$962.8913
